The present invention relates to a semiconductor device, and more specifically, to a fuse included in a highly integrated semiconductor device for restraining the migration of conductive material after a blowing process.
Generally, a fuse is defined as a kind of automatic cut-off device for preventing an overcurrent from continuously flowing through an electric wire. That is, the fuse melts in order to cut the electric wire due to heat generated by an overflow of electricity, i.e., an electric current. Such a fuse can be easily found in common electrical appliances. The fuse allows the electric current to continuously flow at a normal level; however, once the fuse is cut, the electric current is permanently blocked unless the fuse is replaced with a new one. This point differentiates the fuse from a switch capable of controlling the flow of the electric current.
A semiconductor device is designed to operate according to an intended purpose through a process of injecting impurities into a predetermined region within a silicon wafer or depositing new material. A typical example of the semiconductor device is a semiconductor memory device. The semiconductor memory device internally includes many elements such as a transistor, a capacitor, a resistor and the like for performing a determined purpose; and the fuse is one of the elements included therein. The fuse is used in many areas within the semiconductor memory device; a redundancy circuit and a power supply circuit are typical examples of them. The fuse used in such a circuit is kept in a normal state (i.e., unblown state) during a manufacturing process; however, after the manufacturing process, the fuse can be selectively blown (i.e., cut) during a testing process.
Explaining the redundancy circuit in detail, in the case that a particular unit cell is defective in the semiconductor memory device, the defective unit cell is replaced with a redundant cell through a recovering step. That is, an address of the defective unit cell is stored at the recovering step in order to prevent the detective unit cell from being accessed. When an address for accessing the defective unit cell is inputted externally, the redundant cell instead of the defective unit cell is accessed by the redundancy circuit. The fuse of the redundancy circuit is used for storing the address of the defective unit cell at the recovering step by selectively beaming a laser to a corresponding fuse within the semiconductor memory device for blowing the fuse so that an electrically connected point is permanently cut. This work is called a fuse blowing.
In the case of the semiconductor memory device, a plurality of unit cells is included. After the manufacturing process, it cannot be known how many unit cells are defective as well as where the defective unit cell exists among the plurality of unit cells. Therefore, a fuse box including a plurality of fuses is provided within the semiconductor memory device in order to replace the defective unit cells with the redundant cells.
A data storage capacity of the semiconductor memory device is increased more and more. Accordingly, the number of included unit cells is increased and the number of fuses used for replacing the defective unit cell with the redundant normal cell is also increased. On the contrary, the size of the semiconductor memory device is required to decrease for high integration. As above-mentioned, a laser is selectively beamed to a part of the plurality of fuses to be blown. It is well known that a predetermined interval between adjacent fuses should be kept to not influence a neighboring fuse which is not a target of the blowing process. However, this characteristic of the fuse box causes a decrease in the integration of the semiconductor memory device. Accordingly, a technology is required which is capable of preventing unselected fuses from being blown during a blowing process as integration increases without reducing the number of fuses.
FIGS. 1A to 1F are cross-sectional views illustrating a manufacturing method of a fuse included in a conventional semiconductor device.
Referring to FIG. 1A, a nitride layer 104 is formed on an inter-layer dielectric 102; an oxide layer 106 is formed on the nitride layer 104 in order to form a trench where the fuse is to be formed.
Referring to FIG. 1B, after forming a first photo resist pattern 108 on the oxide layer 106, a trench 110 is formed which exposes a part of the inter-layer dielectric 102 by removing exposed oxide layer 106 and nitride layer 104 using the first photo resist pattern 108 as an etching mask.
Referring to FIG. 1C, a metal layer 112 which constitutes the fuse is formed on the trench 110 and the oxide layer 106. At this time, the metal layer 112 includes copper (Cu).
Referring to FIG. 1D, a fuse 114 is formed by performing a Chemical Mechanical Polishing (CMP) process to the metal layer 112 until an upper part of the oxide layer 106 is exposed.
Referring to FIGS. 1E and 1F, after performing a dama cleaning process to exposed parts of the fuse 114 and the oxide layer 106, a nitride layer 116 for protecting the fuse is formed. After depositing a passivation layer 118 on the nitride layer 116, a second photo resist pattern 120 is formed on the passivation layer 118. A feature of the second photo resist pattern 120 is to expose a blowing region of the fuse.
Thereafter, exposed passivation layer 118 is etched using the second photo resist pattern 120 as an etching mask. At this time, all of the passivation layer 118 can be removed to expose the nitride layer 116 formed on the fuse 114, or the passivation layer 118 can remain thinly on the nitride layer 116 according to an energy of a laser used at the blowing process. Thereafter, remaining second photo resist pattern 120 is removed.
FIGS. 2A and 2B are a cross-sectional view and a plan view respectively illustrating problems of the fuse included in the conventional semiconductor device shown in FIGS. 1A to 1F.
Referring to FIG. 2A, it is shown that a blowing region of the fuse 114 is cut after the blowing process. As the fuse 114 is cut, the inter-layer dielectric 102 is exposed under the fuse 114. However, it is shown that a part of metal material which remains on both sides of the blown region moves into the blowing region. Recently, a size and an area of a wire, a fuse and the like included in a high integrated semiconductor device have decreased causing an increase in resistance; therefore, copper (Cu) whose resistance value is low is used. However, copper (Cu) has low strength and high heat conductivity and corrosiveness in comparison with other metal materials. This means residuals generated when the fuse is blown or remaining in the fuse may migrate according to electrical chemical characteristics in a high temperature or high humidity condition.
Referring to FIG. 2B, after a plurality of neighboring fuses 114A to 114D is blown, at a partial fuse (114A), both ends of the fuse are electrically connected due to the migration of the copper (Cu). When the fuse is still electrically connected even though the fuse should be cut by the blowing due to the properties of the copper, an operation stability of the semiconductor device is degraded. Besides, the migration of copper (Cu) damage may be caused to a fuse which should not be blown when its neighboring fuse is blown.
For preventing the above-mentioned fault of thermal degradation or the like, a metal such as aluminum, tungsten or the like whose heat conductivity is relatively low in comparison with copper has been used for manufacturing the fuse. However, in the case of forming the fuse or the wire using these metals, a resistance values is high from a microscopic process, and thus a processing speed may be delayed or a power loss may occur due to a leakage current. Since a size of the fuse of the wire should be increased to overcome this problem, the integration of the semiconductor device is limited consequently. However, as above-mentioned, in the case of forming the fuse using the copper, the fuse formation is difficult due to the properties of the copper. Therefore, a new fuse which is suitable for a highly integrated semiconductor memory device is required.